In 1972, there appeared in the published literature a new type of bipolar logic circuit technology using vertical NPN transistors with multiple collectors operating as inverters, associated with lateral PNP transistors operating as current sources. This logic is known as "Integrated Injection Logic" (I.sup.2 L). Soon, it appeared that this logic was one of the more important technological innovations of the last years, owing to its various advantages. The advantages are, an excellent figure of merit, a high integration density associated with a real simplicity of design, low power supply voltage requirements, and compatibility with known bipolar processes.
A description of this technology is set forth in the following published articles: "Merged Transistor Logic (MTL)--A Low Cost Bipolar Logic Concept" by Horst H. Berger and Siegfried K. Wiedmann; "Integrated Injection Logic: A New Approach to LSI" by Kees Hart and Arie Slob (IEEE Journal of Solid-State Circuits, Vol. SC-7, No. 5, October 1972, pages 340-351).
Further, this technology and its various applications has been described in a number of U.S. Patents and Publications, a number of which are identified below:
U.S. Pat. No. 3,736,477, entitled "Monolithic Semiconductor Circuit for a Logic Circuit Concept of High Packing Density", granted May 29, 1973 to H. H. Berger et al.
U.S. Pat. No. 3,816,758, entitled "Digital Logic Circuit", granted June 11, 1974 to H. H. Berger et al.
U.S. Pat. No. 3,823,353, entitled "Multi-Layered Vertical Transistor Having Reach-Through Isolating Contacts", granted July 9, 1974 to H. H. Berger et al.
U.S. Pat. No. 3,916,218, entitled "Integrated Power Supply for Merged Transistor Logic Circuit", granted Oct. 28, 1975 to H. H. Berger et al.
U.S. Pat. No. 3,922,565, entitled "Monolithically Integratable Digital Basic Circuit" granted Nov. 25, 1975 to H. H. Berger et al.
U.S. Pat. No. 4,035,664, entitled "Current Hogging Injection Logic", granted July 12, 1977 to H. H. Berger et al.
"Integrated Injection Logic (I.sup.2 L)" by C. M. Hart et al., Philips Technical Review 33, No. 3, 1973 pages 76-85.
"Terminal-Oriented Model for Merged Transistor Logic (MTL)" by H. H. Berger et al., IEEE Journal of Solid-State Circuits, October 1974, pages 211-217.
"The Injection Model--A Structure-Oriented Model for Merged Transistor Logic (MTL)" by H. H. Berger, IEEE Journal of Solid-State Circuits, Vol. SC-9, No. 5, October 1974, pages 218-227.
"Injection-Coupled Memory: A High-Density Static Bipolar Memory" by S. K. Wiedmann, IEEE Journal of Solid-State Circuits, Vol. SC-8, No. 5, October 1973, pages 332-337.
"Integrated Injection Logic-Present and Future" by N. C. DeTroye, IEEE Journal of Solid-State Circuits, Vol. SC-9, No. 5, October 1974, pages 206-210.
"The Bipolar LSI Breakthrough, Part 1: Rethinking the Problem" by H. H. Berger et al., Electronics, Sept. 4, 1975, pages 89-95.
"The Bipolar LSI Breakthrough, Part 2: Extending the Limits" by H. H. Berger et al, Electronics, Oct. 2, 1975, pages 99-103.
"Bipolar Logic Steps up to LSI, with the Smart Money on I.sup.2 L", Electronics, Feb. 21, 1974, pages 91-96.
"Bipolar LSI Takes A New Direction with Integrated Injection Logic" by C. M. Hart et al., Electronics Oct. 3, 1974, pages 111-118.
"Integrated Injection Logic--A New Approach to LSI" by N. C. de Troye, 1974 IEEE International Solid-State Circuits Conference, Digest of Technical Papers, pages 12, 13.
"Design Considerations for Merged Transistor Logic (Integrated Injection Logic Circuits)" by H. H. Berger, 1974 IEEE International Solid-State Circuits Conference, Digest of Technical Papers, pages 14, 15.
In integrated injection logic technology, the base circuit is the inverter since the load resistors are cancelled. An associated lateral PNP transistor drives the base of a vertical NPN transistor operating in the reverse mode. The vertical NPN transistor may be provided with multiple collectors.
The structure corresponding to this elementary circuit is conventional. For example, it is described in an article by N. deTroye in the ISSCC Digest of Technical Papers 1974, pages 12, 13 and 214, February 1974, FIG. 1A. In this article, the author emphasizes the influence of the topology, i.e., the arrangement of the multi-collector NPN transistor with respect to the injector, upon the performance of the circuit, and in particular, upon the propagation delays. If the base region is arranged perpendicularly to the injector the latter looks like a rail (FIG. 1A). The current density in the base decreases from the closest collector to the more remote collector due to the voltage drop caused by the base resistance. Therefore, it is the collector closest to the injection rail which will switch the soonest. Conversely, if the base region is arranged in parallel with the injector, all the collectors of a same circuit will receive the same current and thus, will switch at the same speed.